This invention relates to a frequency synthesizer and, more particularly, an arrangement using phase lock loops with one loop including an arithmetic synthesizer for fine resolution.
Prior art approaches to frequency synthesizers have included direct synthesizers utilizing a multiplicity of selectable frequency sources and mixing stages. Other approaches include indirect synthesizers using one or more phase lock loops to achieve the desired number of frequencies.
An object of this invention is to provide a rapid switching, low power, low spurious and fine resolution frequency synthesizer.